Australian Permanent Residency + Relocation Provided FPGA Software Engineer / Development (C++, Python) Low Latency Trading
Westbury Partners
  • locationSydney, NSW
  • salaryNot disclosed
  • full-time 22 March 2021
  • locationSydney, NSW
  • salaryNot disclosed
  • full-time
Job Description

This job will give you and your family Australian Permanent Residency + Relocation!    Global, Market Leading Innovative Trading firm - Exceptional remuneration FPGA (Software interface), C++, Python, Linux, Network, TCP/IP, UDP, Multicast Constant micro & macro projects, tech prototyping, experimentation, performance Company Our Client is a market leading innovative technology house that has operations on all continents around the globe. They are a renowned global employer of choice that provides one of the greatest working environments available in technology combined with the financial benefits of working in and around trading. Due to ongoing growth, they are looking for a forward-thinking FPGA Engineer (software interface) to provide ever-iterating automated low latency solutions. Team The team is responsible for developing and supporting the platforms for high-frequency trading in a world where speed is king, and automation is a standard. This requires the constant innovation and iteration of the platforms to bring in and utilize industry best practice and bleeding edge technologies to enable strategic gain. The environment has been low-level performance tuned (down to the Kernel level) and connects to multiple in-house developed systems, creating a highly complex multi-threaded platform. Role  This position is primarily responsible for FPGA engineering, specifically software interface and computer architecture overlapping with networking sensitivity solutions. This will see you work closely with existing infrastructure teams, the front office and development teams to provide timely, business sensitive technical solutions. This is a highly friendly team environment where you will be supported, developed technically, and encouraged to further master low-level technical ability. Requirements: Strong C++ software engineering skills, OO design principals & patterns. Experience with FPGA engineering from an interface perspective. Strong scripting skills with Python. Experience with packet data (sniffing, parsing, loss, analysis) and computer architecture. Strong networking principles – Ethernet, TCP/IP, UDP, Multicast, Microwave. Interest in solving highly technical problems with real-time, low latency systems. Bachelor’s, Master’s or PhD degree in computer science or mathematics. A history of good tenure in your career (4+ years ave.) Analytical data wrangling experience to show technical insights. Experience with Verilog / VHDL (desirable)   This role would be suited for people coming from an Embedded Systems, FPGA Engineer, Performance Engineer or Hardware Programming background and DOES NOT require previous financial services experience.   #FPGA #Python #C++ #Trading #Low Latency #Automation #Networking #TCP/IP #UDP #Multicast #Verilog #VHDL #Packet Sniffing #Realtime

Supporting Documents

    NONE

Share This Job
About

As a leading specialist fibre and network solutions provider, Vocus connects people, businesses, governments, and communities across Australia and New Zealand, to the world. With a world-class team of experts, we challenge convention and do things d

Supporting Documents

    NONE

company-profile-photo

Australian Permanent Residency + Relocation Provided FPGA Software Engineer / Development (C++, Python) Low Latency Trading

  • Job Details:
    Not disclosed AUD
    Sydney, NSW, Any
  • Key Dates:
    22 March 2021
    Last -9 days to apply
  • Industry:
    Information and Communication Technology
  • Insights:
    0 Applicants
    1 Views
Job Description

This job will give you and your family Australian Permanent Residency + Relocation!    Global, Market Leading Innovative Trading firm - Exceptional remuneration FPGA (Software interface), C++, Python, Linux, Network, TCP/IP, UDP, Multicast Constant micro & macro projects, tech prototyping, experimentation, performance Company Our Client is a market leading innovative technology house that has operations on all continents around the globe. They are a renowned global employer of choice that provides one of the greatest working environments available in technology combined with the financial benefits of working in and around trading. Due to ongoing growth, they are looking for a forward-thinking FPGA Engineer (software interface) to provide ever-iterating automated low latency solutions. Team The team is responsible for developing and supporting the platforms for high-frequency trading in a world where speed is king, and automation is a standard. This requires the constant innovation and iteration of the platforms to bring in and utilize industry best practice and bleeding edge technologies to enable strategic gain. The environment has been low-level performance tuned (down to the Kernel level) and connects to multiple in-house developed systems, creating a highly complex multi-threaded platform. Role  This position is primarily responsible for FPGA engineering, specifically software interface and computer architecture overlapping with networking sensitivity solutions. This will see you work closely with existing infrastructure teams, the front office and development teams to provide timely, business sensitive technical solutions. This is a highly friendly team environment where you will be supported, developed technically, and encouraged to further master low-level technical ability. Requirements: Strong C++ software engineering skills, OO design principals & patterns. Experience with FPGA engineering from an interface perspective. Strong scripting skills with Python. Experience with packet data (sniffing, parsing, loss, analysis) and computer architecture. Strong networking principles – Ethernet, TCP/IP, UDP, Multicast, Microwave. Interest in solving highly technical problems with real-time, low latency systems. Bachelor’s, Master’s or PhD degree in computer science or mathematics. A history of good tenure in your career (4+ years ave.) Analytical data wrangling experience to show technical insights. Experience with Verilog / VHDL (desirable)   This role would be suited for people coming from an Embedded Systems, FPGA Engineer, Performance Engineer or Hardware Programming background and DOES NOT require previous financial services experience.   #FPGA #Python #C++ #Trading #Low Latency #Automation #Networking #TCP/IP #UDP #Multicast #Verilog #VHDL #Packet Sniffing #Realtime


Be Careful

Don’t provide your bank or credit card details when applying for jobs. Learn how to protect yourself here.